Field of the Invention
The invention relates to a circuit configuration for capturing the load current in the case of small currents of a field effect-controllable power semiconductor component. The configuration includes a further field effect-controllable semiconductor component, wherein the drain and gate terminals of the two semiconductor components are connected to one another, and a fraction of the load current flows through the further semiconductor component. The load current of the further semiconductor component is set as a function of the drain-to-source voltage of the two semiconductor components. The load current flowing through the further semiconductor component is compared with a reference current and an output signal is generated if the load current falls below a set value. A controllable device generates a drive signal for the semiconductor components. European published patent application EP 0 294 882 describes a circuit configuration with an intelligent high-side power switch designed as a MOSFET, and with a second MOSFET for current sensing. The gate and drain terminals of the two MOSFETs are in each case connected to one another. A fraction of the load current of the load MOSFET flows through the second MOSFET. Furthermore, the circuit configuration has a current capture apparatus. In order to capture the load current, the source terminals of the load MOSFET and the second MOSFET are respectively routed to an input of an operational amplifier whose output controls a third MOSFET. The load path of the third MOSFET is connected in series with the load path of the second MOSFET. As a result of this, the current of the second MOSFET can be set in such a way that the drain-to-source voltage of the load MOSFET and the second MOSFET correspond. A comparison between the measured current and the reference current is determined by means of a reference current source. A logic signal is generated in dependence on the difference between the reference current and the sense current through the second MOSFET.
U.S. Pat. No. 5,004,970 describes a circuit configuration for detecting a load current through a load connected in series with a power MOSFET. The current is less than a predetermined reference current. The object is to detect a load interruption. The circuit configuration has a voltage detection device which comprises a second MOSFET, a resistor, and an operational amplifier and monitors the drain-to-source voltage of the power MOSFET. The power MOSFET and the second MOSFET are thereby connected in such a way that the two source terminals and the gate terminals are connected to one another. Given the same drain-to-source voltage of the power MOSFET and the second MOSFET, a fraction of the load current through the second MOSFET flows through the second MOSFET on account of the smaller number of cells. The circuit configuration furthermore has a feedback path with a further operational amplifier, the voltage across the load and the reference voltage being fed as input signals to the further operational amplifier. The output of the further operational amplifier controls the gate terminals of the power MOSFET and the second MOSFET in such a way that the gate-source voltage is reduced as soon as the voltage across the load becomes less than the reference voltage at the further operational amplifier.
Such a circuit configuration has been described for example in the article "Surviving Short Circuits" by R. Frank and A. Pshaenich, Machine Design, Mar. 8, 1990, pages 89-96. The article explains the principle whereby the load current of a power MOSFET can be captured by connecting a similar MOSFET with a smaller area in parallel with the power MOSFET and connecting a measuring resistor in series with the smaller MOSFET, the so-called "sense" FET, on the source side. If the power FET is connected to a load on the drain side, then a current which is approximately proportional to the load current flows through the further FET. The proportionality factor in that case depends on the ratio of the current-carrying areas of the sense FET to that of the power FET. If a load current flows through the load and thus through the power FET, then a part that is approximately proportional to the load current thus flows through the sense FET and the measuring resistor. A voltage which is approximately proportional to the load current can then be picked off at the measuring resistor.
It is a precondition that the measuring resistor be coordinated with the load. In the case of a different load, therefore, it is necessary to change either the measuring resistor or the evaluation logic that captures the voltage.
Accordingly, the voltage drop across the power transistor is measured in the prior art. If the voltage drop falls below a predetermined value, for example 10 mV, a logic signal is generated which signals a no-load state. The level of the no-load threshold is thus dependent on the on-resistance of the power transistor and is consequently inaccurate. Furthermore, the error becomes ever greater during measurement in the case of small load currents.